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|a AR-LpUFIB
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| 100 |
1 |
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|a Hinton, Jeremy
|
| 245 |
1 |
0 |
|a Transputer hardware and system design
|
| 250 |
|
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|a 1st ed.
|
| 260 |
|
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|a Nueva York :
|b [S.n.],
|c 1993
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| 300 |
|
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|a x, 286 p. :
|b il. ;
|c 23 cm.
|
| 500 |
|
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|a Incluye glosario y bibliografía. --
|
| 505 |
0 |
|
|a Transputer architecture -- The two-cycle memory interface -- Designing with the two-cycle memory interface -- The three-cycle programmable memory interface -- Designing with the programmable three-cycle memory interface -- Transputer system interconnection -- System testing and debugging -- The T9000 second-generation transputer -- App. A. Instruction set overview -- B. Transputer versions -- C. PAL design equations -- E. Extracts from device data sheets -- F. Example programs.
|
| 650 |
|
4 |
|a TRANSPUTERS
|
| 650 |
|
4 |
|a PROCESAMIENTO PARALELO
|
| 700 |
1 |
|
|a Pinder, Alan
|
| 942 |
|
|
|c BK
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| 952 |
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