Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors

Detalles Bibliográficos
Autor Principal:	Azambuja, José Rodrigo
Otros autores o Colaboradores:	Kastensmidt, Fernanda, Becker, Jurgen
Formato:	Libro
Lengua:	inglés
Datos de publicación:	Cham : Springer International Publishing : Imprint: Springer, 2014.
Temas:	Engineering. Electronic circuits. Electronics. Microelectronics. Circuits and Systems. Electronic Circuits and Devices. Instrumentation.
Acceso en línea:	http://dx.doi.org/10.1007/978-3-319-06340-9
Resumen:	This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time. â_¢ Discusses the effects of radiation on modern integrated circuits; â_¢ Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques; â_¢ Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs; â_¢ Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments; â_¢ Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.
Descripción Física:	xviii, 94 p. : il.
ISBN:	9783319063409
DOI:	10.1007/978-3-319-06340-9

MARC


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245	1	0	\|a Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors \|h [libro electrónico] / \|c by José Rodrigo Azambuja, Fernanda Kastensmidt, Jurgen Becker.
260		1	\|a Cham : \|b Springer International Publishing : \|b Imprint: Springer, \|c 2014.
300			\|a xviii, 94 p. : \|b il.
336			\|a text \|b txt \|2 rdacontent
337			\|a computer \|b c \|2 rdamedia
338			\|a online resource \|b cr \|2 rdacarrier
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505	0		\|a Introduction -- Background -- Fault Tolerance Techniques for Processors -- Proposed Techniques to Detect Transient Faults in Processors -- Simulation Fault Injection Experimental Results -- Configuration Bitstream Fault Injection Experimental Results -- Radiation Experimental Results -- Conclusions and Future Work.
520			\|a This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time. â_¢ Discusses the effects of radiation on modern integrated circuits; â_¢ Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques; â_¢ Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs; â_¢ Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments; â_¢ Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.
650		0	\|a Engineering. \|9 259622
650		0	\|a Electronic circuits. \|9 259798
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650	2	4	\|a Instrumentation. \|9 259652
700	1		\|a Kastensmidt, Fernanda. \|9 261291
700	1		\|a Becker, Jurgen. \|9 261292
776	0	8	\|i Printed edition: \|z 9783319063393
856	4	0	\|u http://dx.doi.org/10.1007/978-3-319-06340-9
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950			\|a Engineering (Springer-11647)
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Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors

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