High-Bandwidth Memory Interface
| Autor Principal: | |
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| Otros autores o Colaboradores: | , |
| Formato: | Libro |
| Lengua: | inglés |
| Datos de publicación: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
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| Series: | SpringerBriefs in Electrical and Computer Engineering,
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| Temas: | |
| Acceso en línea: | http://dx.doi.org/10.1007/978-3-319-02381-6 |
| Resumen: | This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.  â_¢Â Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; â_¢Â Presents state-of-the-art techniques for memory interface design; â_¢Â Covers memory interface design at both the circuit level and system architecture level. |
| Descripción Física: | viii, 88 p. : il. |
| ISBN: | 9783319023816 |
| ISSN: | 2191-8112 |
| DOI: | 10.1007/978-3-319-02381-6 |
Tabla de Contenidos:
- An introduction to high-speed DRAM
- An I/O Line Configuration and Organization of DRAM
- Clock generation and distribution
- Transceiver Design
- TSV Interface for DRAM.